Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas necessary for true innovation. For more information about Draper, visit www.draper.com.

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Draper is committed to creating a diverse environment and is proud to be an affirmative action and equal opportunity employer. We understand the value of diversity and its impact on a high-performance culture. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, disability, age, sexual orientation, gender identity, national origin, veteran status, or genetic information.

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We are seeking a talented senior engineer to join the digital design team at Draper. The successful candidate will contribute to FPGA development including architecture, design, synthesis, verification, validation, test, and support. Candidate must have experience using high level design, simulation and verification tools and be familiar with process flows supporting design and verification for digital FPGA efforts. Direct experience with embedded FPGA design is required. This is a HYBRID position, and the candidate should be willing to come onsite to the Cambridge office 2-3 days per week as needed.

Required Qualifications:

BSEE with 6+ years relevant experience
• Fluent in SystemVerilog
• Recent experience implementing your own synthesizable SystemVerilog RTL and unit testing SystemVerilog RTL
• Experience designing with Xilinx FPGAs
• Lab debugging experience
• Experience reading and writing macro and microarchitecture specifications

Preferred Qualifications:

• MSEE with 6+ years relevant experience
• Experience designing and implementing the following in digital design realm:
  • Control loops with filters, PI controllers in synthesizable RTL
  • Arithmetic operations in synthesizable RTL
  • Memory/communications interfaces
  • Algorithm implementation in synthesizable RTL
• UVM or verification experience

Security Requirement:

Current in scope US Secret clearance or ability to obtain required.

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